OUR SPEAKERS 2025


Balancing Coding Rules with Embedded Systems Constraints


Most organizations and projects establish coding rules or guidelines to help developers write clean, safe, readable, and maintainable code. However, these rules sometimes conflict with the need for performance efficiency and memory usage – especially when dealing with specific hardware and compilers. Since these attributes are critical to the success of embedded projects, we need to adapt certain rules to strike the right balance. In this talk, we will share our experiences and insights on this topic, focusing specifically on the challenges in embedded software development. This will give you guidance on what pitfalls to look out for and how to address them.

Data Mining Hardware Descriptions from Code, Tools, and Docs

There are a lot of slightly different microcontrollers out there. So many, that it is difficult to answer simple questions about what features they support, especially in detail. In this talk we'll look at what data sources exist for STM32 devices and how easily they are to access and how accurately they are compared to each other. May contain actual data science!

Security Beyond Memory Safety - Using Modern C++ to Avoid Vulnerabilities by Design

Nowadays, there is one topic that comes up in virtually all discussions on system programming languages: memory safety.

However, even though memory safety rules out many of the most common sources of vulnerabilities, there are still plenty of ways how a vulnerability may find its way into the codebase. In this talk, we look beyond memory safety and explore how we can prevent vulnerabilities through simple yet effective C++ constructions.

To this end, we discuss security engineering, attacker models, threats, and implementation pitfalls, before looking at solutions that are not just secure by themselves but also protect developers from accidentally introducing vulnerabilities in the future.

Together, we iteratively apply these solutions to an elaborate example inspired by real-world products, use cases, and vulnerabilities, to end up with a sustainably secure software.

Attendees will leave with a deeper understanding of security engineering and with inspirations for leveraging C++ to prevent potential security issues by design.

Experiences with codebases of three C++ Quantum Libraries: Quantum++ (qpp), Staq, and Qulacs

This talk presents experiences on working with the codebases of three C++ quantum libraries: Quantum++ (qpp), Staq, and Qulacs. Specifically, the talk will compare coding paradigms, performance trade-offs, and compatibility considerations. Key takeaways include coding guidelines for leveraging C++ in quantum software development and lessons learnt for selecting the most suitable library based on specific requirements.

Specifiers, qualifiers and the long road to const

In C++98, we already had const, volatile, static, extern and inline. In C++11, thread_local and constexpr were added. In C++17, inline variables were introduced. In C++20, we've got consteval and constinit. But have you ever wondered what a static inline thread_local constexpr const volatile variable is? In this talk, Mikhail will attempt to break down all this variety of keywords. We'll recall linkage and storage duration. We'll understand the connection between static and constexpr, between extern and inline. And we'll realize why it took us almost 20 years to learn how to properly declare constants.

The Evolution of Hammer

Software development is not only about writing code, it’s also selection of tools, processes and infrastructure. Some of them is visible in day-to-day work, some hidden in background. All of it affects quality and comfort of our work. This talk is a case study on how we (Flight Software team in KP Labs) evolved out infrastructure and tools for (mostly) embedded development over 6 years.

Cross-Layer Approximations for Enabling Energy-Efficient Edge Computing

Approximate Computing (AxC) has emerged as a powerful technique for enhancing the efficiency of AI and machine learning (ML) workloads on resource-constrained edge devices. By intentionally introducing controlled inaccuracies in computations, AxC takes advantage of the inherent resilience of AI/ML models, leading to significant improvements in power, performance, and area (PPA). AxC can be applied across various layers of the computing stack, but approximate arithmetic operators have a particularly direct impact on the PPA costs associated with arithmetic operations during AI inference. Therefore, researchers are actively exploring approximate arithmetic operators that offer substantial PPA benefits while capitalizing on the error tolerance of AI models. In this presentation, we will introduce the topic and highlight the importance of the cross-layer approximation framework. We will emphasize the need for a generic and scalable approach to designing approximate arithmetic operators. Additionally, the presentation will discuss the crucial role of considering the architectural specifics of the underlying platform when developing approximation techniques, particularly those suited for FPGA-based approximate computing.

Hardware-in-the-Loop testing using low-cost hardware and C++OS

Hardware-in-the-loop (HIL) testing is an important step in the development of embedded systems. Most interaction in embedded systems are based on digital protocols like I2C, U(S)ART, SPI or even simple high/low GPIOs. For testing the correct handling of such interfaces the external counterpart can easily be provided by low-cost boards running C++OS. This presentation shows how you can use C++OS on a such a low-cost board to run HIL tests on your embedded system.